Principal Design Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Responsibilities

• Lead the SW architecture for various Subsystem/Chiplets
• Work on various standardized architectures and protocols for scalability and interoperability across various chiplets
• Contribute to SW architecture efforts based on SW design knowledge and experience. Provide inputs for architecture planning by carrying out study and experiments.
• Design for high level of configurability, automation and re-use
• Work with all stake-holders - across HW, Tools and SW teams for smooth and timely execution
• Define the development flow and processes with proper coding guidelines, static analysis, code reviews and QA to realize high quality SW.
• Lead the teams technically, review their documents & code and help with troubleshooting

• BE/BTech/ME/MS/MTech in Electrical/Electronics

• 10+ years of experience in SoC SW development
• Strong experience in embedded software, firmware, BSP, driver development
• Experience in pre-silicon and post-silicon software development for 3 or more SoCs.
• Strong experience on porting and using multiple RTOSes and/or high level Operating Systems
• Good understanding of SoC architectures, and processor (ARM/RISC-V) architectures
• Good understanding of various peripheral interfaces and protocols (PCIe, USB, I2C, SPI, I2S, MIPI)

• Must possess strong written, verbal and presentation skills
• Ability to establish a close working relationship with customers, peers and management
• Explore what's possible to get the job done, including creative use of unconventional solutions
• Work effectively across functions and geographies
• Push to raise the bar while always operating with integrity
• Swiftness, nimbleness and a sense of urgency to get the job done with high quality and in a timely manner.