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Description
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Perform RTL-level and circuit-level power simulations for various designs and use cases. Provide design guidelines as well as drive optimizations for energy efficient SoC designs. Extract insightful results from simulation to estimate power for different use cases. Perform SoC power emulations, which are taking the SoC RTL design and building the design on state-of-the-art FPGA machines for rapid and more accurate power estimations. Develop power models to estimate the impact of design decisions in various subsystems, including using different semiconductor technology processes, transistor types, operating frequency, and operating voltage. Work with the architecture team, RTL design team, design verification team, and physical design team to determine the correct functionality of design for debugging power simulation pipeline issues and investigate power reduction opportunities. Code in Lua, Python, shell scripting, and SystemVerilog to set up and update power simulation pipelines. Perform silicon measurements to obtain actual hardware power data and correlate with existing power models to understand how accurate the model is and future model improvements. Write detailed engineering decisions and summaries of simulation pipelines to make it easier for other colleagues to get up-to-speed and re-use existing tools. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 - $214,500/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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Minimum Qualifications
- Master's degree or foreign equivalent Electrical Engineering or related field
- Education and/or experience must include the following skills:
- SystemVerilog or Verilog, including understanding RTL code for power optimization.
- UVM to add power related code to generate power vectors.
- Understanding PTPX to run power simulations, analyze reports, and find power issues.
- Using nWave to debug FSDB and anchor the root cause of the power issue.
- Using Python or any scripting language to mine power data.
- Utilizing C (or C++) to do power measurement in silicon.
- Working with synthesis and physical design in ASIC to optimize power.
Preferred Qualifications
- N/A
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .
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