CPU Implementation Feasibility Engineer

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! Apple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU implementation feasibility.

Description

As an Apple soft-IP CPU Implementation Feasibility Engineer, you will be working for RTL feasibility and PD feasibility including tech/CAD work and PD methodology work. You will be responsible to provide technical guidance to FE/BE designs of other IPs. Responsibilities also include but are not limited to: • Making area/frequency/performance/power trade-offs • Driving RTL-to-GDS flow through synthesis/place-and-route with ambitious goals for power, performance, and area • Working with cross-functional engineering teams to implement and validate physical design on the aspects of timing, area, power, testability, and reliability • Performing different floorplanning experiments to understand the microarchitectural feasibility for achieving high targets for performance, power and area • Performing different feasibility experiments for RTL innovations and improvements that drive the next generation high performance chips • Working on PD methodology customized for CPU architecture • Driving discussions with FE/BE designers in other IPs

Minimum Qualifications

• Minimum BS and 10+ years of relevant industry experience
• Experience with synthesis, PnR and clock flow, and PPA optimizations

• The ideal candidate will have implementation experience on high-performance CPU designs
• Deep knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUs
• Understanding of static timing and critical path closure techniques
• Experience with Power analysis tools
• Understanding on technology, library, and macro design