RELOCATION ASSISTANCE: No relocation assistance availableCLEARANCE TYPE: SecretTRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.Northrop Grumman Mission Systems is seeking an experienced and motivated Senior Principal Microelectronics Semiconductor Photolithography Process Engineer for our Advanced Packaging Technology µ-Line in Apopka, Florida.
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Northrop Grumman's semiconductor foundry, packaging, integration, and test lines have unique capabilities of supporting a range of production microelectronics and providing leading-edge technology development.
The Apopka, Florida, wafer bumping µ-Line supports flip chip, 2.5D, and 3D packaging for internal and external production customers as well as emerging technology programs. The line provides a range of bump compositions and processes that include photo, sputter, electro-plating, AOI, and solder-sphere transfer to support flip chip, 2.5D, and 3D packaging using 100 mm to 300mm wafers. The devices supported in Apopka will also be subjected to singulation and die/wafer probe testing.
What you get to do:
The Senior Principal Microelectronic Semiconductor Photolithography Process Engineer will provide manufacturing and development technical support and direction on a wide range of photolithography processes and tools.
Primary responsibility will include supporting photolithography processes and tools for resist coating, exposure, development, and associated metrology. The role will involve a broad range of lithography toolsets related to 1x manual and automated tools.
You will work closely with cross-functional teams in Process Engineering, Manufacturing, Quality, Integration, and R&D to ensure process stability, improve yield, and drive continuous improvement initiatives.
Plan and execute continuous photochemical and lithography improvement projects to increase yield, productivity, and cost effectiveness, including rework improvements.
Define and implement lithography process improvements for new technology insertion to improve process robustness and achieve technology milestones for yield, reliability, etc.
Develop new technologies across the portfolio of emerging technologies in semiconductor manufacturing, including photochemical, reticle, and lithography processes.
Gather GDS files and program/foundry information to complete mask reviews with engineers and ensure layouts meet all design rules and guidelines
Use GDS files and program/foundry information to create Apopka die drawing specific to each program for engineers, technicians, and operators to use to run the product.
Mentor and train technicians on shift to support quality and delivery metrics for operations.
Execute strategic projects for the improvement of sustaining operations through monitoring statistical process control (SPC) charts and disposition of out-of-spec material.
Drive process improvements for volume manufacturing using statistical tools, DOE techniques, data-driven decision making, and systematic problem-solving skills.
Support process control, planning, safety, and quality organizations to ensure the equipment meets cost, quality, safety, and reliability metrics.
Lead Root Cause and Corrective Actions troubleshooting task forces and help develop solutions that prevent recurrence of excursion incidents using 8D problem-solving methodologies.
Achieve customer on-time delivery and cycle time commitments through tool qualification and OEE management with manufacturing operations.
Use Failure Mode and Effects Analysis (FMEA) to assess and mitigate risk for process changes.
Position will demand large amounts of time working in a cleanroom environment. Some lifting and standing will be required.
Support capital equipment projects through procurement, installation, and release for production use
Support engineering data analysis, including metrology data, ERP (SAP) data, and other in-process metrics
Coordinates with production on day-to-day activities. Assists in the resolution of production workflow issues.
Support of manufacturing capacity planning optimization for the photo production lines.
Support Digital Transformation initiatives
The chosen candidate must have excellent verbal and written communication skills; be able to multitask in a fast-paced, dynamic, and high-visibility environment; and work well as part of a team.
Basic Qualifications for a Sr. Microelectronic Semiconductor Process Engineer:
Bachelor's degree in science or other related STEM area and at least two (8) years of experience in Microelectronic Semiconductor Engineering, Production, or related area.-(6) years with a Masters; (4) years with PhD
Experience with photolithography, process control, and semiconductor processing
Experience in setting up, supporting, and troubleshooting lithography processes and tools
Experience in a manufacturing environment
Experienced in Design of Experiment (DOE), Statistical Process Control (SPC), and 6 sigma concepts for process development and control
Experience in technical data collection, organization, and analysis skills
Proficient in data analysis techniques/programs.
Excellent oral and written communication skills with a strong attention to detail.
Work efficiently in a group or as an individual contributor.
Proficient in project management.
Fluency in MS Office software applications
Familiarity with ERP systems and SAP
US Citizenship is required.
Ability to obtain Secret Clearance
Preferred Qualifications:
Experience with Matlab, VBA, and/or similar
Experience with CAD software (AutoCAD, NX, or similar)
Experience with Minitab software
Experience with SAP MRP software
Experience with UBM and solder bump metallurgy and how they impact package reliability.
Experience with both lead and lead-free bump technologies.
Experience in flip-chip, 2.5D, and 3D packaging
Active Secret Clearance
* Blackbelt Certification
MANUMS
Salary Range: $118,600.00 - $178,000.00The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.