ASIC Engineer, Infra Silicon Enablement

Meta is hiring ASIC Engineers within the Infrastructure Silicon Organization. We are looking for individuals with experience in validation of GPU/ML Accelerator development to build the SW/FW, Framework and Test Suites that power our Pre/Post Silicon efforts.As an ASIC Engineer developing in the Infra Silicon Enablement team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta's data center applications.

ASIC Engineer, Infra Silicon Enablement Responsibilities:

• In this role you will work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions - from early architecture and design inputs, pre-silicon validation, bring-up and post-silicon characterization and deployment in fleet. Responsibilities will include host side development of PE/SIMT validation SW/FW and Test Suites.
• Create/develop validation and automation tool sets targeted at silicon validation and productization - inclusive of, but not limited to silicon diagnostics, performance analysis, debug tools, bare metal and full stack systems, from early labs to data center deployments.
• Understand production system use cases to improve validation.
• Provide feedback into next generation architecture and design with insights from the production fleet.
• Leverage technical skill set in ASIC design, bare-metal embedded FW development, and/or complex test development to build & execute comprehensive pre and post-silicon test plans. Develop related functional, stress and performance tests.
• Root-cause, resolve and remediate issues with silicon related to PE/SIMT Cores

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• 8+ years of experience in hands-on SW/FW/HW Engineering preferable parallel computing (CUDA, Triton, Pytorch).
• 4+ years of knowledge/understanding of silicon/server/systems architecture and components.
• 4+ years of experience with troubleshooting, debug and analytics.
• Experience in Python & C/C++ programming skills (data structures, algorithms, and OOP) and familiarity with low-level hardware interactions
• Experience working with internal and external partners for ASIC and/or systems development.
• Experience developing/ using validation infrastructure across the full silicon lifecycle.

• Experience in ASIC Design, Development or Validation
• Expertise in GPU architecture, SIMT architecture, CUDA, PyTorch
• Expertise in pre-silicon (emulation) and post-silicon environments
• Experience with Linux systems and server systems management.
• Experience with performance optimization of algorithms.
• Experience in debugging tools for systems-on-chip (SoCs).
• Experience with revision control systems like Mercurial(Hg), Git or SVN.
• Experience working across and building relationships with cross-functional teams - architecture, design, model, emulation, validation and systems teams.