Job Description
Come join Intel's Programmable Solutions Group (PSG) working on next generation FPGA technologies. The PSG Software Architecture team is seeking an experienced FPGA/SASIC solutions designer to help implement solutions supported by of soft IP and software for FPGAs. This forward-looking and highly dynamic role provides unique opportunities to implement cutting edge solutions to guide the development of our silicon and software, while also directly enabling our customers. The role requires a self-starter with strong interpersonal communication, collaboration, and pathfinding skills along with a broad understanding of FPGA architecture, FPGA design, and FPGA CAD tools. Experience in Intel FPGAs and Structured ASICs would be a distinct advantage.In this role, you will have the opportunity to work directly with Silicon design teams, CAD tool teams, IP design teams, applications engineering and planning to define and influence new FPGA product development while implementing holistic customer solutions that meet market requirements and delight customers.
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In Q4 2023, Intel announced PSG will be reported as a separate business unit beginning on January 1, 2024 with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.
Qualifications
You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Education:Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.Minimum Qualifications:5 years of experience in FPGA and/or Structured ASIC design with FPGA/SASIC design tools. Experience in UVM based verification a plus.Preferred Qualifications:7 years of experience in FPGA and/or Structured ASIC design with FPGA/SASIC design tools. Experience in UVM based verification a plus.
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
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Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.