Minimum qualifications:
- Experience with SoC low power architecture and design.
- Experience in Power aware verification, Gate level simulations, and Post silicon bring-up.
- Experience creating design verification strategies and constraint random verification with System Verilog and UVM.
- Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
- Experience in post-silicon validation and debug.
- Experience with low power coverage closure and power aware simulations.
- Knowledge of assertion-based formal verification.
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
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Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Perform Power Aware Verification on the design regress, and resolve the required low power coverage metrics.
- Develop verification components, and test-bench for low power verification.