Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 3 years of experience with verification methodologies and languages (e.g., UVM, SystemVerilog).
- Experience developing and maintaining verification testbenches, test cases, and test environments.
- Experience working on main interconnects, DMA, controllers, and power management, and capturing design specifications in a temporal assertion language (e.g., SVA, PSL).
- Master's degree or PhD in Electrical Engineering or Computer Science.
- Experience working with one or more formal verification tools (e.g., JasperGold, VC Formal, Questa Formal, or 360-DV).
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About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
In this role, you'll perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You'll also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
- Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
- Resolve difficult to verify properties. Contribute improvements to methodologies to enhance formal verification results.
- Architect and implement reusable formal verification components.