Compiler Engineer, Silicon

About the job

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

We are the team that builds Google Tensor TPU - Google's custom System-on-Chip (SoC) ML accelerator that powers the latest Pixel phones. Tensor makes transformative user experiences possible with the help of cutting-edge Machine Learning (ML) running on Tensor TPU. The compiler team is responsible for analysis, optimization, and compilation of ML models targeting the EdgeTPU. Our work enables Gemini Nano, our efficient AI model for on-device tasks to run on Pixel phones. Our goal is to productize the latest ML innovations and research by delivering computing hardware and software.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Work as part of the EdgeTPU compiler team, including analyzing and improving the compiler quality and performance on optimization decisions, correctness, and compilation time.
• Develop parallelization and scheduling algorithms to optimize compute and data movement costs to execute ML workloads on the EdgeTPU.
• Work with EdgeTPU architects to design future accelerators, the hardware/software interface, and co-optimizations of the next generation EdgeTPU architectures.
• Work on efficient mapping of generative AI models and other key workloads into EdgeTPU instructions through the compiler.
• Collaborate with ML model developers, researchers, and EdgeTPU hardware/software teams to accelerate the transition from research ideas to user experiences running on the EdgeTPU.