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Job Description
Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP products. This is a tremendous opportunity to work with an experienced team focusing on development of high-performance IP related to DDR/LPDDR/GDDR.
The role will be a key member of technical staff in an organization responsible for IP activities including but not limited to Pre-Silicon integration and Post silicon bring-up and test support for the customers. This candidate will be the primary interface between customer and CDNS R&D team. Candidate should possess strong communication skills with ability to manage multiple priorities on day-to-day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear communication of status, are must-have attributes in this role.
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Primary Responsibilities:
- Responsible for supporting integration / customization / post silicon bring up of CDNS DDR IP subsystems.
- Analyze and resolve complex subsystem application or implementation issues and provide professional guidance to customers.
- Support DDR PHY and controller SOC integration reviews, and integration questions.
- Perform and help debug RTL and gate level simulations to verify functionality.
- Perform and help debug Synthesis/STA scripts/constraints.
- Participate in development of Application notes, Training materials.
- Participate in development of CDNS documentations and checklists for customers.
- Support post silicon bringup and deployment activities by our customers.
- Enhance customer experience by providing prompt updates to customers.
Position Requirements:
- M.S. Electrical/Computer Engineering (or similar degree)
- 5+ years of overall experience
- Experience working with DDR5/4, LPDDR5/4 IP.
- Verilog RTL design and gate level verification experience.
- Synthesis and STA experience, back-end experience is a plus
- Familiarity with industry standard DFT flows and test methodologies.
- Familiarity with package and board design.
- Ability to read schematics and participate in SI/PI reviews for customer board/package implementation
Preferred Qualifications
- Experience with DDR PHY and DSP based architectures
The annual salary range for California is $128,100 to $237,900. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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