At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side with our leading edge customers. With your expertise, you'll help them deploy Cadence's market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater your powers, the more business opportunities you'll help bring to the table. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies.
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At Cadence, customers are at the heart of everything we do. Talented leaders like you are what enable us to materialize this passion into results. By working directly with Cadence R&D and driving customer engagements, you will enhance your in-depth knowledge in nanometer design, unlock unique expertise in digital design implementation, and level up your communication, customer, and sales skills.
Key Responsibilities
- Be part of team of Application Engineers providing technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff
- Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
- Collaborate with team to conduct technical presentations and product demonstrations
- Drive technical evaluations/benchmarks to success
- Work closely with R&D to enhance the tools and methodologies to meet and exceed customer's requirements
- Drive adoption and proliferation of Cadence tools and technologies
- Provide guidance to the team to amend & augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows
- Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements
Job Requirements
Minimum
- Requires a BS or MS in EE with 7+ years industry related experience in design and EDA (Digital Physical Implementation)
- Experience using Digital software with at least one major EDA vendor flow. Automation skills using Perl, Tcl and shell scripting essential
- Strong analytical & analysis skills covering design closure is critical. Deep understanding flows, able suggest solutions to customers and provide feedback to R&D based on the QoR analysis
- Deep understanding of timing analysis and signal integrity (SI) analysis in Static Timing Analysis tool.
- Responsible for analyzing circuit and interconnect delay and signal integrity analysis of large scale circuits, Understand timing correlation of delay/SI analysis to SPICE
- Proven track record and experience working in a fast paced environment Excellent customer interaction & presentation skills
Preferred;
• Strong and In-depth hands on Physical Design Domain/STA/Synthesis.
• Expertise in one of the Industry Standard Physical Design tool - Innovus, Genus. Tempus ,EDI, ICC2, Olympus
• Good & Hands On expertise in STA, Prime Time, Tempus, ETS
• Strong fundamentals in Timing / timing closure.
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