Physical Design Engineer

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Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work with logic design team to understand partition architecture and drive physical aspects early in design cycle for silicon results and contribute to new methodologies and flows to alleviate voltage requirement of power rails. Implement gate level netlist to GDS2 implementation for partition(s) meeting schedule and design goals. Set up, hold and transition with Static Timing Analysis (STA) checks and closure. Assist with the physical & electrical verification, drive the signoff closure for the partitions. Resolve design and flow issues related to physical design, identify potential solutions, and drive execution. Revise placement in order to get the optimized placement. Conduct clock tree synthesis, optimization, routing and post-route optimization. Improve PPA (Power, Performance and Area) for the Physical design to help reduce die size, reduce power consumption and increase operating frequency of designs. Run IR (voltage) drop and Dynamic IVD (instantaneous voltage drop) of main design interfaces. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $162,244 - $214,500/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

• Bachelor's degree or foreign equivalent in Electrical Engineering or related field and 5 years of post-baccalaureate progressive experience in the job offered or related occupation.
• 5 years of experience with each of the following skills is required:
• Experience with industry leading EDA tools for creating floorplans, placement and routing of multi-million transistors in the smallest footprint on Silicon.
• Understanding Clock and Power distribution networks.
• Experience designing with multi-corner & multi-mode scenarios to account for Silicon Process Voltage and Temperature (PVT) variations.
• Experience with static timing analysis to clean the design of setup and hold violations in circuits.
• Using scripting languages tcl and python to automate and mine trends and diagnostic data from experiments.
• Experience in design to mitigate effects of Electron Migration and static and dynamic voltage drops to ensure functional Silicon.
• Understanding Design rule checkers to deliver a Tapeout clean database on time.

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