Formal Validation Engineer

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Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work on the complete formal verification for single or multiple design blocks and IP's (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/OMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.). Work with Apple Silicon's world-class SOC and IP design engineers to develop a formal microarchitecture specification. Develop comprehensive formal verification test plan. Prove properties of the design, find design bugs, and work closely with design teams to help improve the micro-architecture. Craft novel and creative solutions for verifying complex design micro-architectures. Develop and implement re-usable and optimized formal models and verification code base. Responsible for architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,238 - $220,900/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

• Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.
• Experience and/or education must include:
• Working with digital hardware design principles.
• Utilizing model checking-based approaches to verify systems, including hardware or protocols.
• Utilizing general formal methods principles.
• Communicating formal verification plans and results to dynamic validation and design partners.
• Analyzing computer architecture and SoCs.
• Using hardware description languages including Verilog or VHDL to develop formal test benches.
• Utilizing scripting languages including Python, Perl, or TCL in a hardware engineering and CAD context

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

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Client-provided location(s): Cupertino, CA

Job ID: apple-200622005-0836

Employment Type: OTHER

Posted: 2025-09-29T19:10:36