FE Engineer
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Description
APPLE INC has the following available in Austin, Texas. Read, understand and provide feedback on micro-architecture specification documents to understand the component being designed. Write Verilog code for the assigned sub-components and review the code with team members and micro-architects to ensure that the code written matches the specs. Debug any functional faults with the code using the test benches written by the Design Verification Team. Review the faults to determine whether the bug was due to the design being incorrect or due to incorrect DV modelling. Work with the Physical Design teams to ensure that the design meets the Area and Power requirements set by those team. Write Coverage code to ensure that all signals and corner cases of the design are tested by the DV team. Work with the Performance team to ensure that the code meets the performance requirements set at the start of the project. 40 hours/week.
Minimum Qualifications
- Master's degree or foreign equivalent in Electrical Engineering, Computer Engineering, or related field.
- Experience and/or education must include:
- Utilizing system Verilog to write RTL for high speed designs.
- Performing RTL design with FSMs.
- Working with industry standard verification and debug tools.
- Using low power design concepts and techniques in design and implementation.
- Working with industry standard synthesis and timing analysis tools.
- Applying computer architecture principles.
- Working with micro architecture documents and designing based off those specifications.
Preferred Qualifications
- N/A
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .
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