Design Verification Engineer

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Description

APPLE INC has the following available in Seattle, Washington. Work with design and micro architecture teams to understand the functional and performance goals of the System-on-a-Chip (SOC) design. Study and review design specifications to develop a robust verification plan. Define Design Verification (DV) testbench methodology, develop test attributes, write tests and generate test coverage to ensure functional correctness of the design. Run regressions, manage bug tracking, and analyze design performance to verify that it meets the product requirements as specified by the architecture teams. Work and manage deliverables to align with project goals and support cross-functional engineering efforts like power analysis, emulation, silicon validation and product bring-up. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $135,400 - $204,000/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

• Bachelor's degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field and 1 year of experience in the job offered or related occupation.
• 1 year of experience with each of the following skills is required:
• Utilzing System Verilog to code testbenches that can verify functionality and performance of digital hardware designs
• Using Verilog to understand and debug digital designs and write verilog test bench wrappers and components.
• Experience in Design Verification Testbench development to understand digital design specfifications and developments and verify functionality of design.
• Using Python as Scripting Language to write scripts for stimulus and test creation, regression analysis, and coverage collection.
• Automating numerous verification practices achieved through a scripting language.
• Experience in Computer Architecture, including system level understanding of hardare functionality.
• Using C to create and debug behavioral reference models for digital hardware
• Experience running regressions, managing bug tracking, and analyzing design performance to verify that it meets the product requirements.

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