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Description
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Develop block-level test benches for RTL simulation and implement such test plans using System Verilog. Write assertions, and add function coverages for UVM testbenches. Maintain regressions, debug any failures and improve current flow by Python scripting. Add new testcases for existing test plans and enhance existing scoreboards using System Verilog and Python. Develop Models based on the design doc and metrics. Develop Model test plans using C++ and Python. Ensure a bug-free first silicon for part of the cellular modem SoC / IP. Develop detailed test and coverage plans based on the micro-architecture. Develop a verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, and coverage. Execute verification plans, including design bring-up, DV environment bring-up, regression enabling, and debugging of test failures. Track and report DV progress using a variety of metrics, including bugs and coverage. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 - $214,500/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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Minimum Qualifications
- Master's degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field.
- Experience and/or education must include:
- Professional design tools (architecture/microarchitecture simulators, RTL synthesis tools, area/power/thermal modeling).
- Planning and specification, writing a Verilog model, designing custom circuits, creating a testing/debug strategy, and full-chip integration and verification.
- Compilers, networks, operating systems, and computer architecture.
- Networking technology and protocols.
- Design and implementation of digital circuits in a modern VLSI process technology.
- Using modern computer aided design (CAD) software to design, simulate, and lay out digital circuits.
- Programming in C++.
Preferred Qualifications
- N/A
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .
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