Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Constrain random verification process, functional coverage, code coverage, assertion methodology, and verification techniques. Validate chip designs using testing in various forms, such as directed tests and random tests. Perform coverage processes, such as functional coverage and code coverage, including measuring the quality of testing using chip simulation on Hardware simulation software/engines. Use Synopsys (VCS simulator) or Cadence (XLM simulator) to simulate the behavior of the chip under various stimulus conditions, and check that this behavior matches the expected output. Conduct debugging techniques such as triaging, bucketizing, analyzing and root-causing to pin-point and fix the incorrect design elements. Apply Industry standard protocols, such as AMBA, I2C, SPI, PCIE, USB, etc. to accomplish design compatibility and design reuse across the chip industry. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $162,244 - $214,500/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

• Master's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, Computer Engineering or related field and 2 years of experience in the job offered or related occupation.
• 2 year of experience with each of the following skills is required:
• Experience in Universal Verification Methodology (UVM) Testbench Architecture, test plan, and coverage, including experience creating Testbenches.
• Experience in Pcle Adapter Layer IP and debugging, including utilizing PCIE protocol for high-bandwidth transfer into and out of the chip.
• Experience in DDR3, DDR4, and DDR5 BIST Controller for high-bandwidth memory accesses from off-chip memory banks.
• Experience in SystemVerilog Programming for hardware verification tasks.
• Experience in constrained random test cases.
• Using Simulation tools Synopsys VCS or Cadence Xcelium (XLM) to simulate the Hardware design and run tests.
• Debugging RTL designs using waveform debug programs such as Verdi Automated Debug System, or Indago Debug Platform.

• N/A