Design Verification Engineer

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Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Use System Verilog and UVM library to develop testbench components and verify components inside the GPU chip. Apply knowledge in object-orientated programming, computer architecture, and digital designing to understand the GPU and develop high-quality code. Utilize other scripting languages like Python, Ruby and Perl to automate some of development flow to improve productivity. Collaborate with colleagues to share good coding practices, pit falls, and other things. Summarize and report the development status every week, identifying risks in the timeline and mitigating them by prioritizing critical path tasks. Use hardware design tools, like Cadence Xcelium, Indigo, and Verdi, to assist development and debugging of RTL errors. Develop verification plans in coordination with design leads and architects. Build and maintain portable verification test bench components and environments. Generate directed and constrained random tests. Run simulations and debug design and environment issues. Create functional coverage points, analyze coverage, and improve the test environment to target coverage holes. Create automated verification flows for block verification. Apply knowledge of hardware description languages (VHDL/Verilog) to verify complex designs. Work with other block, memory subsystem, and core level engineers to ensure seamless verification flow. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 - $214,500/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

• Master's degree or foreign equivalent in Electrical Engineering or related field.
• Education and/or experience must include each of the following skills:
• Creating and maintaining Testbench environments using UVM to verify hardware designs.
• Knowledge of Object-Oriented Programming principles to create vertically reusable and hierarchical testbench components.
• Writing constrained random and directed tests in System Verilog to execute the test plan.
• Running simulations and debugging test failures to uncover hardware or software bugs.
• Verilog and System Verilog for test-bench and design.
• Digital Design for simulating and debugging test cases.
• Understanding computer architecture concepts for testing parts of processor pipeline and caches.
• Computer Machine Organization and programming knowledge

• N/A