CAD STA Technologist

Summary

Posted: Apr 19, 2024

Role Number:200548123

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices! In this exciting role, you'll work collaboratively with the PNR , Custom Digital & Analog Design teams, Power & Tech team and our CAD flow developers. Our team works to specify the analysis condition and IP requirements for timing and noise analysis closure methodologies and we provide guidance specific for timing analysis closure to STA CAD flow developers.

• STA timing closure experience of gate level and transistor level designs in advanced CMOS process.
• Thorough understanding of STA and methodologies for timing closure, good understanding of noise, cross-talk, and OCV effects.
• Excellent data analytical, problem solving, and communication skills.
• Experience working with cross-functional teams and driving decision making is highly desired.
• Programming experience in Python required.
• Prior experience delivering new designs to production under a very ambitious schedule ideal.
• Knowledge of PrimeTime & NanoTime setup/flow automation, Spice simulation and understanding of derates and margins in typical STA/glitch noise closure a bonus.
• Self-motivated and schedule oriented is a big plus.