5,977 jobs for "Integration Engineer"

Lead Application Engineer

At Cadence - Zhubei

Posted on Oct 30

View job Apply on company site

Telecommunications Engineer

At Leidos - Indianapolis

Posted on Oct 30

View job Apply on company site

Android Developer

At Charles Schwab - Austin

Posted on Oct 30

View job Apply on company site

Lead Software Engineer - SRE Cloud Engineer

At JPMorgan Chase - Columbus · Jersey City

Posted on Oct 29

View job Apply on company site

Project Engineering Manager

At Schneider Electric - Salisbury

Posted on Oct 29

View job Apply on company site

Associate Engineer - Verification and Validation

At Eaton - Hadapsar

Posted on Oct 29

View job Apply on company site

Test Engineer

At Leidos - Huntsville

Posted on Oct 28

View job Apply on company site

Salesforce Architect

At Deloitte - Dallas

Posted on Oct 28

View job Apply on company site

Lead Controls Software Engineer

At GE Vernova - Saratoga Springs

Posted on Oct 26

View job Apply on company site

Telecommunications Engineer

At Leidos - Farmington

Posted on Oct 21

View job Apply on company site

Principal Software Engineer

At Palo Alto Networks - Hyderabad

Posted on Oct 20

View job Apply on company site

Vice President, Product Manager

At JPMorgan Chase - Columbus

Posted on Oct 19

View job Apply on company site

Grid Modeling Engineer

At GE Vernova - Chennai

Posted on Oct 16

View job Apply on company site

Principal Software Engineer (Graphics)

At Cadence - Remote / Flexible

Posted on Oct 16

View job Apply on company site

Lead Software Engineer (Graphics)

At Cadence - Remote / Flexible

Posted on Oct 16

View job Apply on company site

Senior Principal DevOps Engineer (Cortex Cloud)

At Palo Alto Networks

Posted on Oct 15

View job Apply on company site

Senior Manufacturing Engineer

At ASML - San Diego

Posted on Oct 15

View job Apply on company site

Mergers & Acquisitions Project Manager, Employee Experience & Productivity

At Apple - Elk Grove

Posted on Oct 10

View job Apply on company site

Project Engineer Intern

At Schneider Electric

Posted on Oct 10

View job Apply on company site

Staff Software Engineer - Simulation Platform (Galileo)

At General Motors - Sunnyvale

Posted on Oct 6

View job Apply on company site

Cadence

Lead Application Engineer

Zhubei, TaiwanPosted 8 days ago

Apply on company site View full job

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Responsibilities:

• Engage with customers to understand verification challenges and identify suitable AI-assisted verification use cases. - UVM testbench and component generation - Test and sequence generation - VIP integration and configuration - Assertion and functional coverage generation - Simulation failure triage and root-cause analysis - Log and waveform analysis - Verification flow automation

• Develop and optimize SystemVerilog/UVM-based verification environments for IP, subsystem, and SoC designs.

• Develop reusable prompts, skills, agents, scripts, and AI-assisted workflows for customer applications.

• Conduct technical evaluations, benchmarks, demonstrations, workshops, and customer training.

• Troubleshoot UVM, simulation, AI integration, and verification flow issues.

• Collaborate with R&D, Product Engineering, and support teams to address customer requirements and technical issues.

• Develop technical collateral, AI use cases, reference flows, and best practices.

Qualifications:

• MS degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

• Five or more years of experience in digital design, functional verification, or EDA application engineering.

• Strong hands-on experience with SystemVerilog and UVM.

• Experience developing UVM environments, including agents, sequences, scoreboards, reference models, functional coverage, and register models.

• Strong understanding of constrained-random and coverage-driven verification methodologies.

• Experience integrating and debugging Verification IP in UVM-based environments.

• Experience with simulation, debug, coverage analysis, or low-power verification.

• Experience with Cadence tools such as Xcelium, Verisium, or VIP is a strong advantage.

• Strong scripting skills in Python, TCL, shell scripting, or Perl.

• Ability to translate verification challenges into practical and measurable AI-assisted solutions.

• Strong problem-solving, communication, presentation, and customer engagement skills.

Preferred Qualifications:

• Experience architecting reusable UVM environments for complex SoC or subsystem verification.

• Experience applying AI or automation to testbench generation, sequence generation, coverage, debug, or regression analysis.

• Familiarity with LLM APIs, prompt engineering, RAG, vector databases, agent-based workflows, MCP, or tool-calling frameworks.

• Experience deploying AI solutions in cloud-based or on-premises environments.

• Knowledge of CPU, interconnect, memory subsystem, low-power, or UPF verification.

• Familiarity with one or more protocols, including: - AMBA CHI, AXI, or AHB - USB or USB4 - LPDDR or HBM - UFS, UniPro, or M-PHY - PCI Express - DisplayPort or eMMC

We're doing work that matters. Help us solve what others can't.

About Cadence

Cadence is a pivotal leader in computational software.

Size: 10,000+ employees
Industry: Technology

View company profile