RTL DESIGN ENGINEER

City: Seongnam-si

State/Province:

Posting Start Date: 3/20/26

Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients' most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com.

Job Description:

SoC Design&Verification Engineer

담당업무

-디지털 논리회로 설계 및 기본 검증

-SOC RTL integration

-IP의 설계사양 및 기본 아키텍쳐 개발

-IP의 검증

-각 디자인 단계별 업무에 대한 실행 또는 지원 : Lint, CDC, DFT, Synthesis, EQ, STA

자격요건

-유관업무 경력 2년 이상

-IC 설계 Flow 및 설계방법론에 대한 이해

-Verilog/SystemVerilog를 활용한 RTL 논리회로 설계 및 검증 지식

-설계사양을 결정하고 이를 회로로 구현할 수 있는 능력

-프로그래밍 스킬: C/C , Perl/Shell script 능력

우대사항

-ARM CPU와 AMBA bus에 대한 이해

-저전력 설계 방법론(UPF)에 대한 이해

-STA에 대한 이해

-검증 방법론(UVM)에 대한 이해

-외국어 우수자(영어)

Mandatory Skills: SystemVerilog .

Experience: 5-8 Years .

Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention.