Sr. Principal Analog IC Designer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Senior Principal Design Engineer

The Sr Principal Analog IC Designer is responsible for design and developing analog/mixed-signal IC circuit blocks, the architecture and initial concept/specification through final verification of conformance to customer specifications. The Sr Principal Analog IC Designer contributes to the design of long-reach SerDes.

The Sr Principal Analog IC Designer's responsibilities include but not limited to:

• Implement and simulate SerDes, AFE, and IO circuits

• Document the circuit implementation and simulation results

• Present circuit performances in internal design review meetings

• Characterize circuit performance and post-process lab data

The Sr Principal Analog IC Designer may also conduct feasibility and architect major SERDES subsystems and provide technical leadership to junior designers.

Position Requirements:

• Canadian Citizen or permanent resident

• Masters or PhD degree in electrical engineering with specialization in analog microelectronics

• Minimum 8 years of experience in CMOS SerDes or high-speed I/O IC design and development (≥16Gb/s) and in technologies ≤16nm

• Excellent problem-solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment

• Must have a thorough understanding of jitter and signal equalization techniques

• Proficient design experience in some of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High-Speed Clock Distribution; ADCs and DACs; Bias and Bandgap; and Voltage Regulators

• Expertise in low-jitter PLL design is a strong asset

• Proficiency in using CAD tools for circuit simulation, layout, and post-layout verification

• Other non-requirements that would be assets for candidates:

o Familiarity with custom IC layout

o Familiarity with Cadence design and simulation tools

o Lab test experience

o Familiarity with scripting languages (python, skill, etc)

o Working knowledge of a set of common SerDes standards (PCIe, Ethernet, etc) and their electrical requirements

Cadence is an equal opportunity employer committed to hiring a diverse workforce.

Concepteur Senior Principal de Circuits Intégrés Analogiques

Le Concepteur Senior Principal de Circuits Intégrés Analogiques est responsable de la conception et du développement de circuits analogiques et mixtes, de l'architecture et de la spécification initiale jusqu'à la vérification finale de la conformité aux spécifications établies. Le Concepteur Senior Principal contribue à la conception de SERDES de longue portée.

Les responsabilités du Concepteur Senior Principal de Circuits Intégrés Analogiques comprennent, sans s'y limiter :

• L'implantation et simulation des circuits SerDes, AFE et I/O

• La documentation de la mise en œuvre du circuit et les résultats de simulation

• La présentation des performances des circuits lors des réunions internes

• La caractérisation des performances des circuits ainsi que le traitement et l'analyse des données de laboratoire

Le Concepteur Senior Principal de Circuits Intégrés Analogiques peut également réaliser des études de faisabilité et concevoir des sous-systèmes SERDES majeurs ainsi que fournir un soutient technique auprès des concepteurs juniors.