Solutions Engineer II

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This position suits people who have some experience participating in the development of large-scale project (possibly using C++ or Python) and would like to broaden their horizons and discover other aspects of software such as infrastructure, program flow, and performance metrics in their next step of career. Pegasus DRC (Design Rule Check) tool is our next generation massively distributed program that performs geometric checks on customers' most advanced chips, and it's important that customer issues be triaged before further investigation effort is invested. Your role will be to narrow down the scope of problem, analyze performance bottlenecks based on your technical knowledge, and communicate your findings with your R&D colleagues and product/QA engineers.

The first mission of this position will be validating the tool on real cases at customer's site. You will be guided the best-known methodologies under different problem scenarios. From there, you're going to develop in-depth knowledge into Pegasus' distributed system, learn the branches and cutlines of program flow, which also involves a lot of source code tracing, and gradually build your own style of troubleshooting by picking up the evidence that you find most critical.

While you are encouraged to study whichever subject that interests you and to fully develop your skills that you think are crucial to your career path, we do have some expectations on you for the up-coming 3 years:

• Gain a bird's-eye view on the tool and have the program flow map in your mind

• Connect and communicate your thoughts freely with colleagues from other groups or departments

• Make an impact by sharing your technical knowledge

Position Requirements:

• Excellent programming skills on one of C/C++/Python/TCL/Perl
• MS in Electrical Engineering (EE), Computer Science (CS), or related area
• Independent trouble-shooting confidence and enjoy on it
• Great communication and summary skill
• (nice to have) 2+ years' experience with Physical Verification area (DRC, LVS, ERC, PERC, Antenna, FILL)
• (nice to have) In-depth knowledge on either ESD, ERC, PERC, gate level netlist, and circuit structure