Solutions Architect

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This position requires a BS-EE/CE or MS-EE/CE with 15+ years in the EDA / verification industry, use of verification tools and a strong knowledge base of the verification and performance analysis of complex digital designs. Requirements include:
• Strong knowledge of simulation and verification tools, with proven expertise in processor based emulation systems a plus
• Strong knowledge of how to debug designs, with debug in processor based emulation / acceleration platforms a plus
• Strong knowledge and direct experience in simulation acceleration methodologies. Virtual acceleration technology and Hybrid platforms experience for IP/SoC environments is a big plus.
• Strong knowledge in FPGA prototyping and SW bring-up is big plus
• Strong knowledge in building/debugging SC models and SW bring-up on virtual/hybrid platforms is a big plus
• Strong knowledge on improving verification throughput by identifying and addressing compile and run time improvements for SoC verification flows is big plus
• Proven expertise in supporting customers (in HW / FW and SW based systems a plus)
• Technical expertise in RTL Design and functional verification using High Level Verification languages such as UVM (SystemVerilog or Specman "e") or C/C++