Software Engineer I - VIP

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems Inc. is looking for a motivated Software Engineer I - VIP to work with us in Belo Horizonte, Brazil.

In this role, you will develop and maintain software libraries for Cadence's Verification IPs, written in C and C++, interfacing with HDL Languages such as Verilog/SystemVerilog. This is a good opportunity to solve challenging problems in this area, using state of the art technology. If you want to know more about Cadence VIP, check Cadence Design Systems channel on YouTube.

Job Description:

• The candidate is expected to be proficient in software programming and follow good coding practices.
• They must have good problem solving and debugging skills.
• They should understand software programming architecture, SoC hardware architecture and interfaces.

• Complete Bachelors degree in Computer Science, Electrical Engineering or related fields
• Experience in Software Development
• Expertise in C/C++
• Scripting: Python, Perl, Bash
• Good verbal and written communication skills in Portuguese and English

• Knowledge of Verilog/SystemVerilog
• Knowledge of OVM/UVM verification methodologies
• Knowledge of the EDA tool flow, RTL Simulation

• Employment category: CLT
• Employment term: 40 hours/week.
• Competitive benefits.
• Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil.