Principal Software Engineer - Low Power Verification

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Principal Software Engineer - Low-Power Verification (Palladium & Protium)

We are seeking a highly skilled Senior Software Engineer to help build the next generation of low-power verification software for the Palladium and Protium emulation platforms. In this role, you will drive innovations that improve the debuggability, performance, and scalability of multi-billion-gate UPF (Unified Power Format) designs across modular compilation flows (2-state and 4-state).

Key Responsibilities

• Design, develop, and optimize low-power verification software for Palladium and Protium.
• Improve UPF design debuggability within the IXCOM Modular Compiler and Parallel Partition Compiler (2-state and 4-state).
• Enhance compiled streaming probes and accelerate waveform generation for large-scale designs.
• Collaborate closely with R&D, Product Engineering (PE), and Application Engineering (AE) to deploy UPF solutions across diverse flows, including:
  • AVIP + UPF + 2/4-state
  • UVMA + UPF + 2/4-state
  • MC + UPF
  • Dielets + UPF
• Consolidate and unify UPF software across Palladium and Protium platforms.
• Contribute to major initiatives such as:
  • MC + PPC flow with UPF 4-state
  • UPF compilation time optimization
  • Full Vision UPF probe integration
  • SAGE UPF debug with Verisium

Qualifications

• Bachelor's degree in Computer Science or Electrical Engineering with 7+ years of relevant experience,
  OR a Master's degree with 5+ years,
  OR a PhD with 1+ year of industry experience.

Required Skills

• Strong proficiency in object-oriented design and C++ development.
• Experience with standard C/C++ libraries and the C++ STL.
• Demonstrated ability to build high-performance software for large-scale data processing.
• Scripting experience in Perl, Tcl/Tk, and/or Python.
• Familiarity with IEEE 1801 and UPF implementation.
• Experience with Verilog, SystemVerilog, and VHDL.

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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Client-provided location(s): San Jose, CA

Job ID: Cadence-R51413

Employment Type: FULL_TIME

Posted: 2025-11-15T18:39:03