Computer Aided Engineer (CAE)- Manager(M5)

Who We Are

Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips - the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world - like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world.

What We Offer

Location:
Bangalore,IND

You'll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible-while learning every day in a supportive leading global company. Visit our Careers website to learn more.

At Applied Materials, we care about the health and wellbeing of our employees. We're committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits.

Educational Qualification :

M.E./M.Tech/Ph.D. in Mechanical, Chemical Engineering or Ph.D. in Physics

Key Responsibilities

• Drive multi‑physics modeling and simulation for next‑generation, energy‑efficient compute platforms leveraging advanced semiconductor packaging technologies.
• This role will play a critical part in silicon-package-system co‑design, enabling architecture tradeoffs and influencing early design decisions for high‑performance CPUs, GPUs, AI accelerators, and heterogeneous compute systems.
• CAE & Multi‑Physics Modeling
  
  Develop and own thermal, mechanical, and coupled multi‑physics models at:
  • Die level
  • Package level (2.5D / 3D)
  • Board and system level
• Perform architecture and packaging trade‑off studies to optimize:
  • Power efficiency
  • Thermal performance
  • Reliability and cost
• Energy‑Efficient Compute Enablement
• Analyze power-thermal interactions for high‑density compute workloads
• Support early‑stage energy per operation (E/op) and power efficiency targets
• Model effects of DVFS, power gating, workload power profiles, and hot‑spot behavior
• Advanced Packaging Focus
• Lead CAE efforts for advanced packaging technologies, including:
  • Chiplet‑based architectures
  • 2.5D / 3D integration
  • Fan‑Out packaging
  • HBM and advanced memory integration
• Assess TSV stress, warpage, CTE mismatch, and thermo‑mechanical reliability risks
• Support package architecture definition and design guidelines
• Define modeling strategy
• Set energy efficiency metrics
• Influence product architecture
• Interface with executives and partners