RFIC Integration Engineer

Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As the Sr. RFIC Integration engineer, you will be at the center of a wireless SoC design group with a critical impact on getting Apple's state-of-the-art wireless connectivity solutions into hundreds of millions of products.

Description

As a Sr. RFIC Integration engineer, you will be a key member of an RFIC design team, integrating and bringing the next-generation wireless SoCs into high-volume production at advanced CMOS technology nodes for Apple products.

Responsibilities

• Top level design including schematic hierarchy, floor planning, timing closure, and top-level releases to the SOC team.
• Close interaction with the RFIC and AMS IC designers, Modeling and DV teams in defining, modeling and simulating various static and dynamic modes of operation for the wireless transceiver.
• Overseeing the layout and verifying the design to ensure a successful tape-out.
• Collaborating with the SOC team, PHY, RTL, and PD team on the analog-digital interface, partitioning of the digital content, static and dynamic controls and registers within radio.
• Working closely with the CAD team on the release flows.
• Working with Program Managers to meet the deliverable timelines for various stages in a wireless product development.
• Cross functional collaboration with Platform Architecture, Systems, Digital Design and RF Hardware teams.
• Working closely with RF DVT team for a successful bring up of the chip, and support in the lab for debug and optimization when silicon is back.

• Master's Degree in Electrical Engineering
• Experience in the area of RFIC / AMS design with advanced CMOS technology nodes
• Deep understanding of RF, analog and mixed signal circuit design
• Direct tape out experience with one or more of the following blocks: ADCs and DACs, PLLs, baseband filters, Mixers, Power Amplifiers and LNAs.
• Familiarity with the integration flows and integration challenges of RF, Analog and Mixed Signal circuits with the Digital portion in an SOC.
• Working knowledge on timing analysis (STA) of analog to digital interface.
• Working knowledge on RTL, PnR, Modeling and Design verification flows

• PhD preferred or MS + 4 years of experience
• Familiarity with STA tools (NanoTime, PrimeTime) is highly desired.
• Experienced with mixed-signal mode verification methodologies including Verilog-AMS and behavioral modeling in Verilog-A and Verilog-D.
• Experience in wireless SoC products is highly desirable.
• Understanding of various architectures and line-ups in transceivers is desired.
• Familiarity with packaging effects, supply isolations, high frequency ESD structures, and circuit layout for optimum performance