Power Integrity Engineer
The Mac organization is seeking a skilled and experienced Power Integrity Engineer to contribute to the development of Mac, Data Center, and Accessory products. This role focuses on the system-level Power Distribution Network (PDN) design, analysis, and validation, requiring a deep understanding of power supply architectures, PDN modeling, PCB design practices, and electromagnetic simulation tools. The engineer will collaborate with multi-functional teams to implement power supply network solutions, develop and validate impedance and droop targets, and verify power supply quality through lab and in-situ silicon measurements.
Description
As a Power Integrity Engineer for Data Center and Mac platforms, you will lead the design, simulation, and validation of power delivery networks (PDNs) for next-generation server and The Power Integrity Engineer will be responsible for pathfinding studies during silicon development, providing feedback to silicon and packaging teams on system integration trade-offs. This includes performing target impedance analysis, transient voltage droop, and phase margin/stability analysis. The candidate will work closely with System Design teams to provide detailed layout strategies and guidelines during design execution and collaborate with HW Validation teams to develop test suites for system-level validation, evaluating design margins on power domains. The role provides PI support throughout the project design process, from system pathfinding and verification to characterization reviews, with continuing guidance through production and ramp.
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","responsibilities":"As a Power Integrity Engineer, you will be responsible for ensuring the quality and reliability of the power delivery network for Mac products. This involves a combination of analysis, design guidance, and validation efforts.
Perform target impedance analysis, transient voltage droop, and phase margin/stability analysis.
Collaborate with System Design teams to provide layout strategy and guidelines.
Develop test suites for system-level validation of power domain design margins.
Provide PI support throughout the project design process, from pathfinding to production.
Drive initiatives to improve processes, procedures, and result quality.
Preferred Qualifications
Experience with CPM (Chip-Power-Model) usage for system transient analysis.
Understanding of die-package-board power delivery network co-design constraints and tradeoffs.
PCB and PKG layout skill.
Experience with Perl, Python, or other scripting languages.
MATLAB experience.
Excellent documentation and communication skills.
Proven ability to work independently, mentor others, and innovate.
Demonstrated experience in driving initiatives that improved process, procedures, and result quality.
Minimum Qualifications
Proven technical understanding of power supply architectures, voltage regulator technologies, power distribution network (PDN) modeling, and PCB design practices.
Working knowledge in 3D/2D EM simulation tools, electromagnetic modeling, and transmission line theory. Skills with associated tools for 2.5D (PowerSI, SIWave, Sentinel-PI, nSys), 3D Full wave (HFSS, nWave), quasi-static tools (Q3D, nApex) is required.
Relevant proven understanding of HSPICE, Spectre, AMS, and Simplis models for system-level transient droop analysis.
Education & Experience: M.S. with 5-7 years of experience, or PhD (preferred) with a minimum of 3-4 years of experience.
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