Graphics Cache Hierarchy Design Verification Engineer
Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices. The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects and Link interface units. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, and a solid foundation in verification methodology is required.
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Description
The GPU Caches, Mem-Hierarchy Verification team is responsible for architectural and µ-architectural verification of sub-blocks within the memory hierarchy of the GPU like caches, interconnects and MMU Units. This role will grow your expertise in both software engineering as well as graphics hardware architecture and µ-architecture. As a member of this team, you will be responsible for authoring test plans for block or subsystem level functionality, architecting and developing highly complex verification software components, and working closely with design team members in debugging and closing the blocks you own. You will be able to work on test benches ranging from sub-blocks, blocks to subsystems containing multiple blocks.
Preferred Qualifications
Background in CPU or GPU architecture
Good fundamental software and programming skills
Design Verification course work with experience in verification languages such as SystemVerilog
Experience with HDL simulators and waveform viewers.
Strong fundamental software and programming skills
Experience with caches, address translation units
Experience with Perl, Ruby, Shell scripting, Makefiles
Minimum Qualifications
Computer Architecture or Computer systems Course work
Experience with Hardware Description languages like Verilog or System Verilog
Experience with Object Oriented Programming Languages and Data Structures.
BS degree in CE, CS or EE
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .
Perks and Benefits
Health and Wellness
Parental Benefits
Work Flexibility
Office Life and Perks
Vacation and Time Off
Financial and Retirement
Professional Development
Diversity and Inclusion
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