Design Verification Engineer

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Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Ensure bug-free first silicon for part of the SoC / IP and developing detailed test and coverage plans based on the micro-architecture. Develop verification methodology suitable for the IP, ensuring a scalable and portable environment. Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage, and developing verification plans. Execute verification plans, including design bring-up, DV environment bring- up, regression enabling all features under your care; and debugging of the test failures. Develop block, IP and Soc level test-benches track, and reporting DV progress using a variety of metrics, including bugs and coverage. Develop tests for digital and analog co-simulations. Execute Low Power simulations with Firmware and UPF. Deliver tests and sequences for ATE based electrical characterization. Participate in Post Silicon bring-up and debug. Develop testplan, tests, checkers for Firmware verification to ensure bug free Firmware delivery for the IP. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Preferred Qualifications

n/a

Minimum Qualifications

Master's degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.

Experience and/or education must include:

Computer architecture and VLSI design

Writing synthesizable RTL code in Verilog

Verifying a digital design

Using Python to automate design verification tasks for efficiency and increased productivity

Utilizing System Verilog to create Testbench for IP Level and System Level Verification

Participating in development and review of test plan, based on design specifications