Skip to main contentA logo with &quat;the muse&quat; in dark blue text.

ASIC Power Engineer

Yesterday Irvine, CA

We are seeking an ASIC Power Engineer to drive SoC power simulation, analysis and optimization for next-generation wireless SOC products. This role requires deep technical expertise in power estimation and a passion for developing highly power-efficient SoCs that enable breakthrough wireless experience.

Description

In this highly visible role, you will be responsible for SoC power estimation, use case power analysis, and driving future SoC power optimization strategies. You will work with a team of talented engineers to integrate innovative power solutions and deliver industry-leading power efficiency.

The position focuses on SoC power estimation and optimization for power-critical wireless products.

- Work with architects to define power-critical use cases and scenarios.

- Establish power targets and collaborate with cross-functional teams to achieve optimization goals.

- Define comprehensive test cases within design verification environments.

- Generate accurate pre-silicon power estimations for design decision-making.

- Analyze power consumption patterns and identify optimization opportunities.

- Develop SoC power models for new architecture designs, enabling performance/power trade-off analysis.

- Understand software and system-level interactions that impact overall power consumption.

Want more jobs like this?

Get jobs in Irvine, CA delivered to your inbox every week.

Job alert subscription


- Partner with lab and silicon characterization teams to correlate models with measured silicon data.","responsibilities":"Perform comprehensive SoC power simulation and analysis using PtPx and PPRTL tools across multiple wireless use cases and operating scenarios.

Develop and maintain accurate power models for new wireless SoC architectures, enabling early power-performance trade-off analysis during design phases.

Collaborate with silicon design teams, architects, and verification engineers to define power-critical test scenarios and establish realistic power targets for wireless connectivity features.

Drive pre-silicon power estimation and post-silicon correlation activities, working closely with Silicon validation teams to validate and refine power models against measured silicon data.

Identify and quantify power optimization opportunities across architecture, RTL, and physical implementation levels, providing actionable recommendations to design teams.

Analyze system-level power interactions between wireless subsystems and other SoC components to optimize overall power efficiency.

Create and maintain automated power analysis flows and methodologies to support multiple concurrent SoC development programs.

Present power analysis results and optimization strategies to cross-functional teams and senior leadership.

Preferred Qualifications

Understanding of electrical properties of on-die PDN, power gating, package and system power delivery.

Hands-on experience with SoC power domains and power management unit (PMU) interactions in complex multi-core chipsets.

Knowledge of power impact at architecture, logic design, and circuit levels.

Experience in power model development for complex SoCs.

Familiarity with SoC design flow and methodology.

Strong communication skills to collaborate effectively across multiple engineering disciplines.

Knowledge of WiFi or Bluetooth standards and protocols.

Minimum Qualifications

BS in Electrical Engineering, Computer Engineering, or related technical field and 10+ years of relevant industry experience.

Hands-on experience with PtPx and PPRTL power analysis tools.

Experience in SoC power simulation, modeling, and analysis flow development.

Experience in ASIC power estimation, analysis and optimization methodologies.

Experience in power model development for IPs.

Hands-on experience in correlating pre-silicon power models with measured silicon data and driving model accuracy improvements through systematic debugging.

Proficiency in scripting languages including Python, Perl, or TCL.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

Client-provided location(s): Irvine, CA
Job ID: apple-200624559-3543_rxr-658
Employment Type: OTHER
Posted: 2025-11-10T19:05:26

Perks and Benefits

  • Health and Wellness

    • Parental Benefits

      • Work Flexibility

        • Office Life and Perks

          • Vacation and Time Off

            • Financial and Retirement

              • Professional Development

                • Diversity and Inclusion

                  Company Videos

                  Hear directly from employees about what it is like to work at Apple.