149 jobs for "Power & Performance Engineer - Platform Architecture"

Wireless SoC Design Engineer

At Apple - Irvine

Posted on Oct 19

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Wireless SoC Design Engineer

At Apple - Irvine

Posted on Oct 19

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Hardware Design Engineer

At Apple - Sunnyvale

Posted on Oct 19

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Wireless SoC Design Engineer

At Apple - Irvine

Posted on Oct 19

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Wireless SoC Design Engineer

At Apple - Irvine

Posted on Oct 19

View job Apply on company site

Wireless SoC Design Engineer

At Apple - Irvine

Posted on Oct 19

View job Apply on company site

Wireless SoC Design Engineer

At Apple - Irvine

Posted on Oct 19

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Hardware Design Engineer

At Apple - Sunnyvale

Posted on Oct 16

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Distinguished Engineer - Quality Engineering & Performance, Wallet, Payments & Commerce

At Apple - Cupertino

Posted on Oct 12

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Senior Software Engineer (Contract)

At Experian - Cyberjaya

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Principal Full Stack Software Engineer (P60) - Growth

At Atlassian - Remote / Flexible

Posted on Nov 1

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Staff Product Systems Engineer - EV Charging/V2X

At General Motors - Warren

Posted on Oct 27

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Senior Software Engineer, Infrastructure Engineering

At Reddit - Remote / Flexible

Posted on Oct 28

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Lead Data Engineer - Python, Databricks, React

At JPMorgan Chase - Glasgow

Posted on Sep 12

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Senior Engineer

At Bank of America - Bromley

Posted on Aug 25

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AI Agent Engineer

At General Motors - Austin · Warren

Posted on May 6

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Senior Software Engineer (Advertising Technology - AWS experience required)

At Warner Bros. Discovery - New York

Posted on Sep 17

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Software Engineer Graduate (Data Arch - Data Ecosystem ) - 2026 (PhD)

At TikTok - San Jose

Posted on Jul 18

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Industrial research engineer for parallel/high-performance computing (CPUs/GPUs)

At Hitachi Energy - Krakow

Posted on Jul 10

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Technical Support Engineer

At Aristocrat - Austin

Posted on Oct 9

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Apple

Wireless SoC Design Engineer

Irvine, CA$175,000 – $308,500Posted 20 days ago

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Come and join Apple's growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborate with people across different functional areas, and thrive during crisis times, we encourage you to apply.

Description

In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers.","responsibilities":"Writing micro-architecture and design specifications.

Coding design in SystemVerilog following established design guidelines, owning all aspects of RTL development design.

Integrate IP blocks and optimize memories/hard macros required for the block.

Supporting verification efforts at multiple levels.

Checking your design with industry standard static tools such as LINT, CDC, RDC.

Analyzing and optimizing area, timing, and power.

Collaborate with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process.

Preferred Qualifications

Shown experience writing micro-architecture specifications and converting them to design

Exposure to design methodologies and industry standard EDA tools.

Experience with AXI/AHB bus fabric and processor sub-systems.

Understanding of UPF and low-power design & implementation techniques.

Self-starter and willingness to learn.

Minimum Qualifications

BS with 10+ years relevant experience.

Familiarity with the ASIC design flow.

Knowledge of digital design, SoC architecture, and HDL languages like Verilog.

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,000 and $308,500, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

About Apple

Working at Apple means doing more than you ever thought possible and having more impact than you ever imagined.

Size: 10,000+ employees
Industry: Technology

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