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Role Overview

Responsible for enabling Foundry PDK teams and Foundry Design Service teams to deliver accurate, signoff-ready on-chip electromagnetic (EM) modeling solutions using Cadence EMX™. This role focuses on EM extraction technology enablement, foundry-qualified modeling assumptions, and scalable reference flow development for advanced nodes, large-scale SoCs, and complex interconnect structures.

Key Responsibilities - Foundry PDK Team Support

Support foundry PDK teams in development, validation, and qualification of EMX technology files and EM modeling setups.
Collaborate with foundries to define EM modeling assumptions for BEOL interconnects, vias, MIM caps, inductors, and advanced process features.
Support foundry requirements on frequency-dependent R/L/C extraction, mutual coupling, and EM accuracy correlation.
Enable EMX usage for foundry-level qualification flows supporting SI, PI, IR-drop, and EM signoff needs.
Work with foundry extraction and modeling teams to ensure consistency between EMX models and downstream signoff tools (Quantus, Voltus, Tempus).
Support PDK release readiness by validating EMX modeling settings against silicon data, reference designs, and correlation targets.

Key Responsibilities - Foundry Design Service Team Support

Develop and maintain EMX-based electromagnetic extraction reference flows for foundry design service teams.
Support integration of EMX extraction results into digital, analog, RF, and mixed-signal design flows.
Provide guidance on EM extraction scope selection, solver configuration, and runtime trade-offs for production designs.
Assist design service teams in resolving EM-related accuracy, convergence, and performance issues.
Enable standardized, reusable EM modeling methodologies across multiple SoC and derivative design projects.
Support multi-die, 3DIC, and advanced packaging EM modeling requirements with EMX-based flows.

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Industry: Technology

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