412 jobs for "Design Verification Lead"

Design Verification Engineer for Cellular Baseband (m/f/d)

At Apple - München

Posted on Oct 19

View job Apply on company site

Virtual Prototyping Specialist - RF embedded systems (m/f/d)

At Apple - München

Posted on Oct 19

View job Apply on company site

Electronic Systems Controls Technical Specialist

At Cummins - Columbus

Posted on Nov 5

View job Apply on company site

Senior Electron Optics Engineer

At ASML - San Jose

Posted on Oct 30

View job Apply on company site

High Speed Systems Engineer

At Leidos - San Diego

Posted on Oct 31

View job Apply on company site

Senior Design Engineer

At Eaton - Worcester

Posted on Nov 8

View job Apply on company site

Experience Design Executive Director - Trust & Security

At JPMorgan Chase - New York

Posted on Nov 2

View job Apply on company site

Senior Quality Engineer - São Caetano do Sul - BRA

At General Motors - São Caetano do Sul

Posted on Nov 5

View job Apply on company site

Cyber Operate Manager - Identity Security Architect & Product Engineering

At Deloitte - Atlanta · Austin

Posted on Oct 31

View job Apply on company site

Lead Product Line Support Engineer

At Eaton - Santo Domingo

Posted on Nov 6

View job Apply on company site

Product Engineering Specialist

At Cummins - Seattle

Posted on Oct 28

View job Apply on company site

Principal Staff, Embedded Software Design

At Schneider Electric - Andover

Posted on Oct 27

View job Apply on company site

Power Electronics Hardware Design Lead

At General Motors - Warren

Posted on Oct 22

View job Apply on company site

Firmware Engineer II

At Cadence - Noida

Posted on Nov 4

View job Apply on company site

High Speed Systems Engineer

At Leidos - King Of Prussia

Posted on Oct 31

View job Apply on company site

Lead Validation & Verification Project Engineer

At GE Vernova - Noida

Posted on Nov 3

View job Apply on company site

Early Careers - Design for Test Engineer

At Apple - München

Posted on Oct 19

View job Apply on company site

User Experience Designer

At Deloitte - Rosslyn

Posted on Oct 28

View job Apply on company site

Senior Electro-Optical Systems Engineer

At ASML - San Diego

Posted on Oct 29

View job Apply on company site

Senior Engineer II, Mechanical Systems Technical Execution Lead

At Schneider Electric - Hyderabad

Posted on Oct 23

View job Apply on company site

Apple

Design Verification Engineer for Cellular Baseband (m/f/d)

MünchenPosted 20 days ago

Apply on company site View full job

Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other's ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It's the diversity of our people and their thinking that inspires the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you'll do more than join something - you'll add something.

Do you have a passion for innovation and technical excellence? Do you thrive on solving complex problems that push the boundaries of what's possible? Join our team to verify innovative, high-throughput cellular baseband modems and transceiver link controllers that power communication for millions of users worldwide.

Description
As a Design Verification Engineer, you'll be at the center of our silicon design group's verification efforts, ensuring the quality and reliability of next-generation cellular systems. Working on innovative baseband modems and RF link controllers for Apple's SOCs, you'll craft highly reusable UVM verification environments that set the standard for quality and efficiency. You'll develop comprehensive coverage-driven and directed test cases that thoroughly validate complex IP and subsystem designs, working closely with multi-functional teams throughout the process.

In this role, you'll drive methodology innovation by deploying sophisticated tools and techniques that elevate verification practices and ensure tape-out readiness. Collaborating with product development teams across Apple, you'll help deliver cellular systems that redefine industry capabilities and enhance customer experiences globally. This position offers exceptional opportunities to deepen your expertise across cellular protocols, complex IP and subsystem architectures, advanced fabric protocols, and sophisticated debug methodologies. You'll gain experience with best-in-class design verification practices, co-verification techniques with models and firmware, and industry-standard low-power architectures.

We're looking for engineers with hands-on ASIC design verification experience using reusable verification methodologies such as UVM. The ideal candidate excels at detailed test planning, adapts optimally to evolving requirements, has knowledge of the latest ML-based tools to improve productivity, and is driven to achieve the highest quality standards. You thrive in collaborative environments and are eager to address the verification challenges inherent in complex, high-performance cellular systems. If you want to contribute to products that impact customers worldwide while advancing your technical expertise, we'd love to hear from you.","responsibilities":"Construct detailed test plans for various components of the design including use cases, through collaborative work with multi-functional teams.
Create coverage driven verification plans from specifications, review and refine to achieve coverage targets.
Architect UVM-based, reusable test benches with components for stimulus, checkers, VIPs and reference models.
Leverage Large Language Models (LLMs) to enhance verification processes, delivering improvements in efficiency and quality.
Design and implement ML-driven workflows that increase team productivity and overall quality of verification.
Implement test plans from RTL simulation bring-up to sign-off; report and debug failures.
Maintain regressions and report the verification progress against test plans and coverage metrics.

Preferred Qualifications
BSc, MSc. or higher degree in Electrical Engineering/Computer Science, Embedded Engineering or similar
Experience in C/C++ modeling for design verification.
Knowledge of 4G/5G cellular physical layer operation (3GPP).
Experience with verification of embedded processor cores.
Hands-on verification experience of Bus Fabric, NOC, AHB, AXI, based bus architecture in UVM environment.
Knowledge of using LLMs to improve efficiency and quality of verification.
Understanding of prompt engineering and LLM workflow optimization.

Minimum Qualifications
Knowledge of System Verilog and UVM.
Experience with System C, C/C++, Python/perl.
Ability to develop and establish DV Methodologies.
Ability to use LLMs and MCPs.
Ability to develop Python-based automation solutions.
Understanding of constraint random testing, SVA, Coverage driven verification.
Test planning and problem-solving skills.

About Apple

Working at Apple means doing more than you ever thought possible and having more impact than you ever imagined.

Size: 10,000+ employees
Industry: Technology

View company profile