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CPU Design Timing Engineer

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CPU Design Timing Engineer

At Apple - Beaverton

Posted on Oct 17

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Apple

CPU Design Timing Engineer

Beaverton, OR$184,700 – $324,800Posted 23 days ago

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Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!

In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure.

Description

As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project.

Responsibilities include but are not limited to:
• Working with the CAD team to develop the timing flow that will be used on the project including scripting to improve analysis flows and engineer efficiency.
• Work extensively with CPU micro-architects and Implementation engineers to drive timing closure for the CPU.

Preferred Qualifications

Prior experience performing timing analysis in high speed digital designs such as CPUs or other similar designs

Understanding of physical design tools and methodology including logic synthesis, PnR, parasitic extraction, logic equivalence

Understanding of deep sub-micron technologies and scaling trends

Working knowledge of CPU microarchitecture including common fundamental timing paths

Working knowledge of clock-domain crossing and reset-domain crossing

Experience with RTL modeling and assertion based verification is a plus

Possess data parsing, analysis and representation/plotting skills

Minimum Qualifications

Minimum BS and 10+ years of relevant experience

Experience with a static timing analysis tool such as PrimeTime® or Tempus®

Experience with timing analysis with multiple clock and power domains, noise analysis, and fixing noise in designs

Experience with variation modeling

Experience with TCL and either Perl or Python

Experience with SDC command usage including clock definitions, timing exceptions, and IO constraints

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 and $324,800, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

About Apple

Working at Apple means doing more than you ever thought possible and having more impact than you ever imagined.

Size: 10,000+ employees
Industry: Technology

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