Wireless Design Verification Engineer

Join Apple's Wireless Connectivity team developing state-of-the-art WiFi SoCs that power hundreds of millions of Apple products worldwide. You'll be part of our vertically integrated organization shaping next-gen wireless technology from concept through production. As a Wireless Design Verification Engineer, you'll ensure first-time-right silicon success through sophisticated testbenches, comprehensive scenarios, and cutting-edge verification methodologies-enabling multi-gigabit wireless technology connecting the world!

Description

As a Wireless Verification Engineer, you will be at the core of our wireless product's success, bridging domains, driving collaborations, and developing verification solutions to ensure excellent products. In this role you will take on verification of controllers, datapaths, subsystems, protocols, low power capabilities, and SOC / integration frameworks. You will leverage and develop environments, create scenarios, and analyze metrics. You'll develop verification strategies for wireless features enabling advanced applications across Apple's product ecosystem.","responsibilities":"Own verification from test planning, environment bring-up, through feature closure.

Develop comprehensive UVM testbench environments and BFMs spanning block to system levels.

Implement constrained random scenarios exercising complex protocol, control, and datapath functionality.

Drive closure by tracking regression metrics, resolving issues, and addressing coverage gaps.

Partner with cross-functional Systems and Design teams to define verification strategy.

Enhance simulation infrastructure automations.

Preferred Qualifications

Experience with bus functional models / transaction-modeling, and separately assertions.

Exposure to system-level modeling or DPI-based verification approaches.

Proficiency with Python, Perl, or Bash scripting for automation.

Experience with Power-Aware / UPF simulations.

Great teammate with excellent communication skills and desire to seek diverse technical challenges.

Minimum Qualifications

BS and a minimum of 3 years of relevant industry experience.

Experience with ASIC verification or complex digital IP development.

Experience developing testbench environments, components, scenarios and bringing up designs in simulation.

Understanding of constrained random testing, functional coverage analysis, and RTL simulation workflows.