Analog Design and Verification Flow (M/F/D)
Oct 1, 2026 München
About us
Working at Apple means doing more than you ever thought possible and having more impact than you ever imagined.
- Size: 10,000+ employees
- Industry: Technology
At Apple, we believe great products begin with great people. By hiring a team with diverse strengths, we drive creative thinking; by giving that team everything it needs, we drive innovation. Through incredible engineers and rigorous process, we deliver the precision behind experiences our customers remember. Join a hands-on development team that thrives on perfection, creativity, and innovation - help us design the next generation of revolutionary Apple products.
Description
In this role, you will use a spec-driven custom design methodology and develop an agentic flow to automate the correlation of specs and simulation data against ATE and lab test results.","responsibilities":"Apply a spec-driven custom design methodology, from specification capture through simulation setup and results checking.
Develop automation (Python/SKILL) that links Cadence Virtuoso design and simulation environments to downstream verification data.
Create agentic flows that pull, align, and compare specs and simulation results with ATE and bench/lab measurements, and flag discrepancies for the design team.
Define and generate correlation reports and dashboards that make spec compliance visible across design, test, and product engineering.
Work with analog designers, test engineers, and CAD/methodology teams across multiple sites to deploy the flow and gather feedback.
Document the flow and support its adoption by circuit design teams.
Preferred Qualifications
Master Degree program in Electrical Engineering or Computer Science or equivalent. Available for 6 months or more.
Minimum Qualifications
Good Knowledge of analog circuit design fundamentals
Basic knowledge of the Cadence Virtuoso design platform
Strong programming skills (Python, Perl, or SKILL) and hands-on experience with agentic flows
Hands-on experience designing or verifying analog circuits
Prior internship or experience in a similar field is an advantage
Strong written and verbal communication skills, with the drive to take on diverse challenges alongside international teams
Description
In this role, you will use a spec-driven custom design methodology and develop an agentic flow to automate the correlation of specs and simulation data against ATE and lab test results.","responsibilities":"Apply a spec-driven custom design methodology, from specification capture through simulation setup and results checking.
Develop automation (Python/SKILL) that links Cadence Virtuoso design and simulation environments to downstream verification data.
Create agentic flows that pull, align, and compare specs and simulation results with ATE and bench/lab measurements, and flag discrepancies for the design team.
Define and generate correlation reports and dashboards that make spec compliance visible across design, test, and product engineering.
Work with analog designers, test engineers, and CAD/methodology teams across multiple sites to deploy the flow and gather feedback.
Document the flow and support its adoption by circuit design teams.
Preferred Qualifications
Master Degree program in Electrical Engineering or Computer Science or equivalent. Available for 6 months or more.
Minimum Qualifications
Good Knowledge of analog circuit design fundamentals
Basic knowledge of the Cadence Virtuoso design platform
Strong programming skills (Python, Perl, or SKILL) and hands-on experience with agentic flows
Hands-on experience designing or verifying analog circuits
Prior internship or experience in a similar field is an advantage
Strong written and verbal communication skills, with the drive to take on diverse challenges alongside international teams
Additional Information
- Posted: Oct 1, 2026