Verification Engineer

  • Position title: SoC ASIC Verification Engineer
  • Responsibilities:
    • Instrumental in the development of infrastructure for the validation of ARM AMBA-based or DSP-based architectures and the verification of SoC/ASIC hardware.
    • Additional duties include the development of directed and random hardware verification environments, and the application of those environments to SOC/ASIC verification
    • Integration of VIP and functional verification agents in UVM verification environment to support coverage-driven verification
  • Qualification:
    • Verification experience on SoC or ASIC chips
    • Experience with high level verification environments/languages such as UVM, VMM, SystemVerilog or Vera
    • Experience developing bus functional models, monitors, scoreboards, generators, functional coverage models
    • Strong C/C++ programming software background is preferred
    • Shell scripts and Perl/Python expertise, create runsim, lsf, regression management scripts
    • Able to understand Verilog/SystemVerilog RTL code, debug simulation errors, identify and fix RTL/Testbench issues
    • Audio & voice DSP background is preferred

Meet Some of Synaptics's Employees

Shubha R.

Sr. Algorithm Architect

As Sr. Algorithm Architect, Shubha is responsible for designing algorithms and hardware that enable touch and force sensing for Synaptics’ Clearpad products, used primarily in smartphones.

Fred C.

Director of Corporate Development

Fred’s main goal is to grow the company, and he achieves this by understanding the market needs of today, preempting tomorrow, and constantly seeking new areas of investment.


Back to top