Synaptics is searching for a hands-on, experienced, team-oriented engineer with SerDes design expertise for the Interface Products Group. In this role, you will be responsible for the design of multi-Gbps Serdes interfaces for next-generation video and data connectivity technologies. You should have expertise in design, modeling, analysis and simulation of high-speed receiver and transmitter SerDes blocks. Responsibilities include:
- Design, modeling, simulation and analysis of high-speed receivers and transmitters, high performance PLLs and clock distribution circuits along with supporting circuits such as opamps, voltage regulators, voltage references, and other analog circuits
- Analyze power, performance, area, and system tradeoffs for different circuit architectures.
- Write, debug, and run testbenches using transistor-level and behaviorally modeled circuits to do performance verification over design corners at all operating modes using circuit simulators
- Analyze package design concerns, signal integrity issues and work with the packaging team to close on design of high-speed signal and power integrity
- Work with ESD experts to incorporate solutions to meet system ESD and high-speed performance requirements
- Work with the verification team to enable integration into top level test environments and provide support via functional models
- Design tests for silicon evaluation and characterization and interface with test, product and applications engineers to successfully bring new interface connectivity products from initial concept through release to production
The candidate should have excellent knowledge of analog and mixed-signal design, be capable of accepting technical lead responsibility and have good interpersonal skills. The person should have a track record of initiative and innovation in their previous experience. The successful candidate will be highly motivated with excellent time management and communication skills needed to work with various engineering and product development groups.
- BS, MS or PhD in Electrical Engineering (or equivalent) with expertise in analog and mixed-signal CMOS IC design
- At least 8+ years of industry experience in transistor-level design of full-custom CMOS analog and mixed-signal building blocks including but not limited to: CTLE, DFE, CDRs, PLLs, transmit drivers, clock distribution, and supporting analog circuits
- Knowledge of PLL loop design and analysis including design of RO and LC VCOs
- Experience with 10Gbps and above SerDes receiver and transmitter designs like PCIe Gen4, Intel thunderbolt 3, ... etc.
- Experience with optimizing analog layout and solving signal integrity issues at the package and board level
- Experience with system-level issues and top-down design methodology; high level circuit modeling and analysis experience using a tool such as Matlab
- Experience in using Cadence and Synopsys custom IC design and simulation tools for analog circuit simulation and mixed-signal simulation
- Working knowledge of programming and scripting languages (C, Perl, Skill, etc.)
- Organized and creative thinker, motivated, and independent learner who can multitask in a dynamic environment, able to create and implement new solutions where required
- Demonstrated problem solving ability, analytical skills and laboratory proficiency
Must have excellent documentation, communication skills and ability to work independently