Skip to main contentA logo with &quat;the muse&quat; in dark blue text.
Siemens

Verification Engineer_MTS-SISW-Mentor

Greater Noida, India

During the current global health crisis, the priority for Siemens Digital Industries Software is the health and wellbeing of our entire community including current and future employees, which may add time to our hiring processes. We appreciate your patience and invite you to visit our website to learn more about how Siemens is responding to the pandemic.

Position: Design and Verification Engineer

About group: Veloce Transactors (Accelerated Verification IPs) Veloce Transactor Group is part of Mentor Emulation Division R&D located in Noida. Group is responsible for developing transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile etc. At present Veloce Transactor Library supports more than 25 protocol solution and expanding further.

Want more jobs like this?

Get jobs in Greater Noida, India delivered to your inbox every week.

By signing up, you agree to our Terms of Service & Privacy Policy.


Work Experience: 2 to 6 years

Education: (BE/BTech/ME/MTech/MS) from any of the premier engineering institutes.

Roles & Responsibilities:

Individual will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Primary responsibilities include understanding standard specifications, develop architecture and micro-arch for the design and writing a synthesizable design using Verilog/System Verilog.

Primary Technical skills:

1. Hands on experience on the protocol e.g. PCIe (preferable)/ USB/ Ethernet/ AMBA in Design or Verification.

2. Good understanding of IP Verification Methodologies, Verification procedures and practices are plus

3. Verilog / System Verilog / System C

4. RTL in developed for FPGAs/ASICs/IPs

5. He/ She must be able to create verification test plans and environments, testcase development, VIP usage, and the ability to debug of defects found through verification processes.

6. He/ She would need to engage with customers for Deployment and R&D assistance.

7. Exposure of object oriented programming using languages such as C++ is advantage

8. Experience in scripting languages such as Perl, Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc

#LI-MGRP

Organization: Digital Industries

Company: Mentor Graphics (India) Private Limited

Experience Level: Experienced Professional

Job Type: Full-time

Job ID: SIemens-193989-en-us
Employment Type: Other

Perks and Benefits

  • Health and Wellness

    • HSA
    • Health Insurance
    • Dental Insurance
    • Vision Insurance
  • Parental Benefits

    • Non-Birth Parent or Paternity Leave
    • Birth Parent or Maternity Leave
  • Work Flexibility

    • Flexible Work Hours
    • Remote Work Opportunities
  • Office Life and Perks

    • Commuter Benefits Program
  • Vacation and Time Off

    • Leave of Absence
    • Personal/Sick Days
    • Paid Holidays
    • Paid Vacation
    • Sabbatical
  • Financial and Retirement

    • Relocation Assistance
    • Performance Bonus
    • Company Equity
  • Professional Development

    • Promote From Within
    • Mentor Program
    • Shadowing Opportunities
    • Access to Online Courses
    • Lunch and Learns
    • Tuition Reimbursement
  • Diversity and Inclusion

    • Diversity, Equity, and Inclusion Program

This job is no longer available.

Search all jobs