Senior Applications Engineer - Calypto HLS - 197866 - SISW - MG

    • Austin, TX

Company: SISW - Mentor
Job Title: Senior Applications Engineer - Calypto HLS - 197866
Job Location: Fremont, CA, El Segundo, CA, or Austin, TX
Job Category: Applications Engineering

During the current global health crisis, the priority for Siemens Digital Industries Software is the health and well-being of our entire community including current and future employees, which may add time to our hiring processes. We appreciate your patience and invite you to visit our website to learn more about how Siemens is responding to the pandemic.

Mentor, a Siemens company, is the longest standing Electronic Design Automation company in the world and over the last 30 years has amassed the finest technology portfolio in the business. Our software tools span the full breadth semiconductor and electrical systems solutions including integrated circuit design and verification, PCB design & manufacturing solutions, cable harness design tools, and embedded software. Due to significant increase in the adoption of high level synthesis tools to increase productivity and significantly reduce time to market our customers look to Mentor to provide the industry's leading High-Level Synthesis Platform, Catapult. We are currently looking for an experienced Field Application Engineer to support our HLS customers.

Job Duties:

  • Work with the World Trade Sales Organization to drive pre and post-sales technical activities to support High Level Synthesis (HLS) growth
  • Analyze customer designs leveraging HLS technology and knowledge to produce better design results and enable success.
  • Assist with customer design and verification.
  • Provide customer training on Calypto Systems Division HLS Product.
  • Perform Beta testing and collaborate with R&D to drive product direction and capabilities of HLS.
  • Will require up to 25% travel in North America (US & Canada) and some international trips.
Job Qualifications:
  • Strong knowledge of VHDL/Verilog/SystemVerilog RTL languages for ASIC or FPGA design and C++ or SystemC.
  • 5-7 years of design or application engineering experience in either an RTL or HLS implementation role (design, not verification).
  • Experience of ASIC or FPGA hardware design and implementation using RTL or HLS tool flows.
  • Experience with computer vision, image processing, video, 5G Wireless or CNN (Convolutional Neural Network) applications.
  • HLS design experience would be a significant plus.
  • Experience of RTL verification flows and methodologies.
  • Bachelor's degree or its equivalent in electrical, electronic or computer engineering or a related scientific field.
  • Ability to travel and work remotely at customer locations in North America (US & Canada).


Organization: Digital Industries

Company: Mentor Graphics Corporation

Experience Level: Experienced Professional

Job Type: Full-time

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