The Tessent product family seeks a highly motivated, creative, and energetic individual as a Product Engineer, specializing in RTL. Tessent is the market and technology leader of automated tools for insertion of semiconductor design-for-test (DFT) structures, automatic test pattern generation (ATPG), embedded deterministic compression (EDT), and diagnosis-driven yield analysis (DDYA). This position presents a phenomenal opportunity to stay involved technically while getting exposure to sales and marketing at the same time. This role will focus on our Tessent product usage at the RTL level such as SystemVerilog synthesis and verification.
Interfaces with mid-level customers, engineers, and managers to develop or enhance complex computer-aided engineering design or manufacturing processes. Uses complex design and tooling tasks involving multiple design environments. Cogently communicates software problems to product development. Much of the focus will be in working through DFT methodologies related to RTL designs and DFT RTL IP insertion such as memory BIST, IJTAG, and other features. Responsible for in-depth technical papers and presentations to customers. Works with minimal supervision on complex projects with latitude for independent judgment and discretion.
- Work collaboratively with Siemens EDA engineering to prototype, evaluate, and test new DFT products and features in context of complex IC design flows.
- Drive product adoption.
- Build and deliver in-depth technical presentations, develop training material, white papers, contributed articles, and application notes.
- Work with customers as well as Siemens EDA stakeholders such as regional application engineers, global support engineers, and marketing.
- Work through complex technical issues and independently create solutions and new methodologies.
- Explain complex principles in simple terms to broad audiences.
- Some travel, domestic and international.
Required Knowledge/Skills, Education, and Experience
- BS degree (or equivalent) in Electrical Engineering, Computer Science or related field is required.
- Knowledge of design languages, tool usage, and RTL Design flow steps required
- Must have 5-8 years of experience and at least 2+ years of experience in DFT or RTL design for complex ASICs / SOCs. Experience in the following areas a plus:
- embedded compression, memory built-in self-test (MBIST), IEEE 1687 IJTAG, boundary scan (BSCAN), hierarchical DFT implementation.
- Exposure to one or more adjacent IC disciplines such as:
- RTL coding and verification using Verilog, SystemVerilog, VHDL.
- Synthesis and timing analysis.
- SDC, LEC, and other RTL design flow components
- Proficiency in a scripting language like TCL.
- Self-motivated and results-oriented with strong problem solving skills.
- Excellent organizational skills.
- Excellent written and verbal English language communication skills.
- Knowledge of IC design trends and emerging requirements.
- Proficiency in LINUX and Windows environments.
- Preferred work location is Wilsonville, OR but other locations can be considered
For candidates in theUnited States: Where permitted by applicable law, Siemens may requireemployees to be fully vaccinated against COVID-19 based on job requirements,and in accordance with an accommodation based on legally protected reasons.
ForCandidates in Canada: SiemensIndustry Software Inc. requires employees to be fully vaccinated againstCOVID-19 unless granted an accommodation due to a disability or sincerely heldreligious belief or practice.
Organization: Digital Industries
Company: Siemens Industry Software Inc.
Experience Level: Experienced Professional
Job Type: Full-time
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