Company: Siemens EDA
Job Title: HW/SW Engineer - Static Timing Analysis
Job Reference #: 201151
Job Location:Wilsonville, OR, Remote, US
SiemensEDA (Formerly Mentor Graphics) has an opportunity for an experienced software/hardware engineer responsible for designing and implementing products/featuresincluding writing specifications, planning, schedule estimation, andimplementation keeping in mind the project timelines, objectives, and goals.
TheTessent team is responsible for developing and providing DFT solutionsinvolving test IPs that improve the overall testability of a design. These testIPs are delivered and treated as any regular IP that have to be integrated intocustomer designs. As the complexity of designs grow along with shrinking designcycles, there is a trend across the industry to push much of the DFT analysis,insertion, and integration of the DFT IPs in RTL. The successful candidateshould have very good knowledge of Tcl/Python programming, digital circuitdesign, and design implementation flows with particular emphasis on delayconstraints, static timing analysis, and timing optimization techniques. Thecandidate must also be conversant with hardware-description languages such asSystem Verilog and VHDL. The candidate isexpected to become an expert on Tessent IPs and will be actively guiding ourcustomers integrate them into their designs.
Thecandidate will be responsible for collaborating with other engineers that arepart of software and hardware development teams, quality assurance, technicalmarketing, technical publications, and customer support teams to enable timelydelivery of high quality products. Self-motivation, ownership of technicalproblems, results driven positive attitude, solid teamwork, and goodcommunication skills are essential for success within the business unit.
- BS/MS/Ph.D. in Electrical or Computer Engineering, or other related field.
- Software Engineering skills, especially in scripting languages such as Tcl and Python.
- Very good knowledge of digital logic design along with hardware description languages, such as Verilog, System Verilog, and VHDL.
- Knowledge of DFT and best known industry practices are desirable.
- Knowledge and understanding of all aspects of a design flow - in particular SDC, static timing analysis, and timing optimization.
- Strong analysis, design, and problem solving skills.
- Attention to details and the ability to accurately estimate tasks and deliver on schedule.
- Good verbal, written, and interpersonal communication skill
Wherepermitted by applicable law, Siemens may require employees to be fullyvaccinated against COVID-19 based on job requirements, and in accordance withan accommodation based on legally protected reasons.
At Siemens we are alwayschallenging ourselves to build a better future. We need the mostinnovative and diverse Digital Minds to develop tomorrow's reality. Findout more about the Digital world of Siemens here: www.siemens.com/careers/digitalminds
Organization: Digital Industries
Company: Siemens Industry Software Inc.
Experience Level: Experienced Professional
Job Type: Full-time
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