ASIC Physical Design Engineer 4
Northrop Grumman Mission Systems (NGMS) is seeking an ASIC Physical Design Engineer 5 to join our team of highly qualified, diverse individuals in Digital Technology. Qualified applicant will become part of the Digital Technology and Secure Processing department located in Linthicum, MD, which specializes in product designs for a variety of applications from undersea to outer space.
Roles and Responsibilities:
The individual will be responsible for back-end ASIC Design including physical place and route, synthesis, timing analysis, and physical verification. Successful candidates will have a thorough understanding of digital design concepts and have prior experience with ASIC development process. Must be knowledgeable in VHDL or Verilog RTL coding and be proficient in place and route, synthesis, static timing analysis, and physical verification (LVS/DRC). Knowledge of DFT, scan insertion and ATPG is a plus.
This candidate will have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals.
- Bachelor's degree in Electrical Engineering or a related discipline and a minimum of 14 years of relevant experience (12 years with a Technical MS, and 9 years with a Technical PhD)
- Experience in full product life cycle of ASIC Design
- Experience in backend ASIC design including synthesis and static timing analysis, place and route, physical verification (LVS/DRC)
- Experience with Cadence ASIC toolset e.g., Innovus, Genus, Tempus etc.
- Proficiency in HDL (VHDL/Verilog)
- Proficiency in scripting languages such as Tcl, Python or Perl
- Experience leading a small team to successfully complete ASIC Design
- U.S. citizenship with an active Secret Clearance.
- Effective communication and presentation skills and high proficiency in technical problem solving
- Master's Degree in Electrical or Computer Engineering
- Experience with advanced technology nodes (sub 20nm)
- Experience with Global foundries, TSMC or Honeywell Foundries
- Knowledge of DFT, scan insertion and ATPG is a plus
- Active DoD Secret Clearance or higher
Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.
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Jacqueline operates on power electronics for Northrop Grumman’s space application projects. She meets with engineering groups, chats with customers, and works on circuit analysis.
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