Come join Intel's CPU organization as a SoC Design Engineer in Design Automation. We create innovative technologies to build one of the most complex IA microprocessors with the highest performance and lower power. This CPU is the heart of Intel's high performance and low-power SOCs for 5G, Autonomous Driving, AI and Machine Learning.
Your responsibilities and experience needed in this highly visible role will include, but are not limited to:
- Develop, support and drive project execution performance verification flows and signoff methodology for cell-based and/or transistor-based designs.
- Drive solutions to perform sign-off verification using both external Engineering Design Automation (EDA) tools and internal CAD tools for back-end design work (Extraction, Static Timing Analysis (STA), electrical rule checks (ERC), circuit checking quality, Static Noise analysis, ECO, SPICE circuit simulation)
- Create flows/scripts to automate tasks and to analyze, test and improve efficiency
- Develop custom optimized solutions to address design requirements for latest technology nodes
- Contribute to the development of multidimensional designs involving the layout of complex integrated circuits
- Expand and standardize design methodologies, especially those related to static timing analysis, cross-clocking domains, and multiple power domain analysis
- Documenting and helping with guidelines/specs
- Proficient with STA concepts such as timing closure, multi-corner, OCV, PVT and process variation, clock skew/jitter, aging), full chip rollup/rolldown constraints, spec timing and timing margins
- Setting up and running spice analysis for clock network or high-speed datapaths
- Knowledge of multi-scenario timing corners/modes, in-die process variations, noise and signal integrity issues.
The ideal candidate should exhibit the following behavioral traits:
- Good inter-personal, organizational, clear communication and teamwork skills
- A can-do attitude driven by research, problem-solving, and thriving on challenges
- Highly self-motivated and directed; self-confidence and self-starter
- Attention to detail
- Proven analytical and problem-solving skills
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.
Candidate must have a Bachelors in Electrical/Computer Engineering or related field and 5+ years experience in: - OR - a Master's degree in Electrical/Computer Engineering or related field and 3+ years of experience in:
- Design principles and techniques in VLSI back-end design, custom-circuit (transistor) design and/or memory design
- UNIX/Linux environments and Perl/Tcl/Shell/Python scripting
- Design Automation and/or CAD for CPUs or SOCs, including timing closure of gate level and/or transistor level designs (RLS, SPICE) in advanced CMOS processes
- Industry standard Engineering Design Automation (EDA) VLSI tools from Synopsys, Cadence and/or Mentor Graphics in one of more of the following: Timing/Power optimization, ECO, Static Timing Analysis, SPICE circuit simulation, statistical variation analysis, noise, cross-talk, OCV and/or ERC flows
3+ years experience in:
- Backend design EDA tools Synopsys, Cadence and/or Mentor Graphics
- EDA tool Tcl API coding
- In-house Intel tools for high-speed custom digital designs
- Machine-learning methods to solve complex problems dealing with automation of circuit design to aid in performance and power improvement.
- Perl/Tcl/Shell/Python scripting
Inside this Business Group
The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
US Experienced Hire JR0159703 Austin Devices Development Group (DDG)