SOC Design Engineer
- Bangalore, India
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.
One must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
- One must possess Master degree(ME/MTech) with VLSI specialization. A minimum of 8 years of relevant experience in standard cell layout design, silicon implementation, and/or process technology.
Desired Skills and Experience:
- Experience in layout design and verification of standard cell circuits backed up by the scripting skills with Perl, Shell, Python, Skill or TCL.
- Ability to drive the library development end to end, including interface with stakeholders, deep insight into layout design, do layout reviews and understanding of PDK/characterized models and ensure they help meet the PPA targets of the library.
- Work with benchmarking team/setups to understand impact of library at block level, interpret results and drive feedback to improve quality of layouts, designs along with understanding specific aspects of Std. cell design like variability, P&R concerns like pin access, DFM friendly design etc.
- Drive and enable the team to design and deliver library with high quality and high efficiency. Should strive towards use of smart automation to simplify and scale ability of the team. Excellent communication skills to effectively interact with characterization, Testchip/PDK, layout, customer teams and drive new methodologies wherever applicable.
- Good understanding of context effects in deep submicron technologies & its impact in designing standard cell layouts, methodologies for reliability checks (Electromigration, variation analysis, noise effects etc.), device context effects in newer nodes, characterization methodologies for timing, power, constraints and familiarity with characterization challenges of special cells like synchronizers, multibit cells, etc.
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
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IN Experienced Hire JR0140077 Bangalore
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