Senior SOC Logic Design & Integration Engineer
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.
Determines architecture design, logic design, and system simulation.
Defines module interfaces/formats for simulation.
Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.
May also review vendor capability to support development.
The responsibilities will be tailored to the candidate's skills and expertise and will include several of the following, but not be limited to:
? Ensuring the logic design meets the architectural specifications
? Contributing at multiple levels on the micro-architecture features and specification.
? Implementing block/sub-system level logic design (RTL) using System Verilog.
? Working with structural design engineers (physical design) on timing closure of critical structures.
? SOC level logic integration.
? You must be able to balance design trade-offs with modularity, scalability, DFX requirements, chassis compliance, power, area, and performance.
? Review and direct technical aspects of engagement with contingent workforce
Must have a BS with 7+ years OR MS with 5+ years OR PhD with 2+ years experience with Electrical Engineering, Computer Engineering, or Computer Science and experience in RTL/Logic design on ASIC's or IP blocks or SOC's using System Verilog RTL coding.
? Strong background in computer architecture
? Strong analytical ability, problem solving and communication skills
? Ability to work independently and at various levels of abstraction
? Demonstrable experience writing System Verilog
? Programming experience in C++, Perl and Assembly Algorithms and digital logic
? Familiarity with a range of internal and 3rd-party logic design tools
? Strong communication and team work stills.
The ideal candidate will be able to demonstrate the following behaviors:
? Experience with SoC integration.
? Experience in DFX, design for test, debug, and manufacturing.
? Experience in post-Si validation/debug
? UVM/OVM testbench experience
? Ability to work effectively with both internal and external teams/customers is expected.
? Ability to mentor other engineers and technically guide them.
? Capable of working in a high performing team to deliver the results required from the organization.
? Facilitator of direct and open communication, diversity of opinion, and debate.
This is an Intel Federal Position
This position involves work on a U.S. Government contract which may impose certain security requirements. The government may require that you certify your citizenship status. If you are not a U.S. citizen, the government may require you to pass a security check before you can be approved to work on the project. Please note that any offer by Intel for this position is conditioned upon meeting and/or passing the U.S. Government's security check requirements should the government impose these requirements.
Inside this Business Group
The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....
US Experienced Hire JR0118209 Hudson
Meet Some of Intel's Employees
Martin S.SoC Design Engineer
Martin uses his communication skills and technical knowledge to perform deep-level debugs of the intellectual properties that come to Intel.
Back to top