Senior BE Engineer
- Ramat Gan, Israel
Job Description Back-End Engineer for a Structural Design team which is part of the Client Development Group working on the next generation CPU products for mobile and desktop market. The candidate will be part of a team that implements the full RTL2GDS flow which involves Synthesis ,Equivalence ,APR and Timing Analysis to sign off. Group is implementing a variety of design styles, from high frequency blocks to high cell count designs and routing channels.
Qualifications: • BSc in Electrical engineering from known University • 5 years of experience in SOC BE design • Deep understanding of construction flow: Synthesis, Place&Route, LO verification • Deep understanding of signoff activities (STA, Power integrity verification, Reliability verification, IR drop and Cross Talk analysis ) • Deep understanding of formal verification tools , mainly for logic equivalent verification (LEC) • Deep understanding of clocks distribution and implementation techniques in block level • Experience in design for power techniques - advantage • Experience in high frequency design convergence - advantage • Experience in full chip activities (routing, clocks, STA) - advantage
Inside this Business Group
The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
IL Experienced Hire JR0141001 Petach-Tiqwa
Back to top