Product/Test Development Engineering: Manufacturing Test Content/Vector development

Job Description
Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Make significant contributions to design, development and validation of testability circuits. Evaluation, development and debug of complex test methods. Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions. Tests, validates, modifies and redesigns circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment.
Qualifications

In this position, you will be responsible for:
• Test vector/content development/implementation and validation of various DFT features such as Scan, MBIST, JTAG, BScan, etc. for Intel's leading edge SoC designs.
• Working with pre-Si design/DFT teams to provide feedback and ensuring vectors are meeting ATE requirements.
• Ensuring vectors/content are stable from Si bringup to volume production, to meet DPM requirements and test cost requirements.
• Delivering best in class product impacting Intel's bottom line.

Preferred Skills and experience:
• Candidate should possess a Bachelors or Masters degree in Computer/ Electrical/Electronics Engineering with about 10 years of experience.
• Strong knowledge of DFT architecture, design, methodologies and tools - Scan, MBIST, Analog DFT, JTAG, etc.
• Hands on experience with minimum of 7 years design/validation experience with strong/proven debug skills.
• Proven Experience in Design for Test/Debug logic design/implementation of Large SOCs
• Expertise in analog DFT & in depth knowledge in mixed signal IP test
• Expertise in Scan, ATPG, at-speed test
• Expertise in memory test, algorithms
• Expertise in Boundary scan & JTAG, 1149.1, 1149.6, 1500, etc.
• Good experience in micro-architecture, RTL coding, system Verilog, test bench development
• Knowledge of other ad-hoc DFT tests, on chip inter connect buses
• Experience in design for debug concepts
• Experience with Synopsys and/or mentor tools and basic understanding of the SoC development flow is must
• Expertise in Si debug, shmoo analysis, statistical analysis to meet DPM and Test Cost targets.
• Experience with Phy and analog DFT
• Knowledge of scripting in perl, shell, etc.
• A very good team player with good interpersonal, planning and communication skills

Inside this Business Group
Employees of the Internet of Things Solutions Group (IOTG) have an exciting opportunity before them: To grow Intel's leadership position in the rapidly evolving IoT market by delivering the best silicon, software and services that meet a wide range of customer requirements - from Intel® Xeon® to Intel® Quark®. The group, a fresh, dynamic collaboration between Intel's Intelligent Solutions Group and Wind River Systems, utilizes assets from across all of Intel in such areas as industrial automation, retail, automobiles and aerospace. The IOTG team is dedicated to helping Intel drive the next major growth inflection through productivity and new business models that are emerging as a result of IoT.

Legal Disclaimer:
Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.

IN Experienced Hire JR0109383


Back to top